TV Decoder

The DE2 board is equipped with an Analog Devices ADV7181 TV decoder chip. The ADV7181 is an integrated video decoder that automatically detects and converts a standard analog baseband television signal (NTSC, PAL, and SECAM) into 4:2:2 component video data compatible with 16-bit/8-bit CCIR601/CCIR656. The ADV7181 is compatible with a broad range of video devices, including DVD players, tape-based sources, broadcast sources, and security/surveillance cameras.

The registers in the TV decoder can be programmed by a serial I2C bus, which is connected to the Cyclone II FPGA as indicated in Figure 1. The pin assignments are listed in Table 1. Detailed information on the ADV7181 is available on the manufacturer’s web site, and from the Datasheet folder on the DE2 System CD-ROM.

Figure 1. Schematic diagram of the TV Decoder chip.

Table 1. Signal assignments for the TV Decoder.

Signal NameDescription
TD_DATA[7:0] TV Decoder Data[7:0]
TD_CLK27 TV Decoder Clock Input.
TD_RESET TV Decoder Reset
I2C_SDAT I2C Clock

See DE2_pin_assignments.csv, a comma-delimited file that matches "standard" descriptive names to actual FPGA pin locations. This file can be directly opened in Microsoft Excel.

Implementing a TV Encoder

Although the DE2 board does not include a TV encoder chip, the ADV7123 (10-bit high-speed triple ADCs) can be used to implement a professional-quality TV encoder with the digital processing part implemented in the Cyclone II FPGA. Figure 2 shows a block diagram of a TV encoder implemented in this manner.

Figure 2. A TV Encoder that uses the Cyclone II FPGA and the ADV7123.


   ADV7181 video Decoder datasheet (pdf)

   DE2 User Manual, version 1.4, 2006. (pdf)

Maintained by John Loomis, last updated 18 April 2007