Chapter 2 – Combinational Logic

Number Systems

Download matlab2.zip with sample MATLAB file.

Altera DE2 Board

Download DE2 project files from diglab1.zip

Comparators

Download sample Verilog files from comparators.zip

• Verilog comparator source
• MATLAB transcript viewer (published MATLAB) transcript.m

Adders and Subtracters

Download sample Verilog files from adders.zip

Multiplication and Division

Binary to Binary-Coded Decimal (BCD)

Download sample files from binary2bcd.zip

• bin2bcd.c
• ip_divide   megafunction with 4-bit denominator and 16-bit numerator.
• div10byte.v   divide 8-bit numerator by ten
• div10.v   divide 16-bit numerator by ten.
• shift – add-3 algorithm
• bcdlab Altera DE2 project demonstrating binary to BCD conversion

Shifters and Rotators

Download sample Verilog files from barrel.zip

Character Sets and Logic Symbols

• logic symbols in HTML

Maintained by John Loomis, last updated 21 Oct 2011