001: /* system.h
002:  *
003:  * Machine generated for a CPU named "cpu" as defined in:
004:  * c:\projects\sys2\software\hello_world_0_syslib\..\..\processor2.ptf
005:  *
006:  * Generated: 2008-11-12 12:08:09.25
007:  *
008:  */
009: 
010: #ifndef __SYSTEM_H_
011: #define __SYSTEM_H_
012: 
013: /*
014: 
015: DO NOT MODIFY THIS FILE
016: 
017:    Changing this file will have subtle consequences
018:    which will almost certainly lead to a nonfunctioning
019:    system. If you do modify this file, be aware that your
020:    changes will be overwritten and lost when this file
021:    is generated again.
022: 
023: DO NOT MODIFY THIS FILE
024: 
025: */
026: 
027: /******************************************************************************
028: *                                                                             *
029: * License Agreement                                                           *
030: *                                                                             *
031: * Copyright (c) 2003 Altera Corporation, San Jose, California, USA.           *
032: * All rights reserved.                                                        *
033: *                                                                             *
034: * Permission is hereby granted, free of charge, to any person obtaining a     *
035: * copy of this software and associated documentation files (the "Software"),  *
036: * to deal in the Software without restriction, including without limitation   *
037: * the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
038: * and/or sell copies of the Software, and to permit persons to whom the       *
039: * Software is furnished to do so, subject to the following conditions:        *
040: *                                                                             *
041: * The above copyright notice and this permission notice shall be included in  *
042: * all copies or substantial portions of the Software.                         *
043: *                                                                             *
044: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
045: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
046: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
047: * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
048: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
049: * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
050: * DEALINGS IN THE SOFTWARE.                                                   *
051: *                                                                             *
052: * This agreement shall be governed in all respects by the laws of the State   *
053: * of California and by the laws of the United States of America.              *
054: *                                                                             *
055: ******************************************************************************/
056: 
057: /*
058:  * system configuration
059:  *
060:  */
061: 
062: #define ALT_SYSTEM_NAME "processor2"
063: #define ALT_CPU_NAME "cpu"
064: #define ALT_CPU_ARCHITECTURE "altera_nios2"
065: #define ALT_DEVICE_FAMILY "CYCLONEII"
066: #define ALT_STDIN "/dev/jtag_uart"
067: #define ALT_STDIN_TYPE "altera_avalon_jtag_uart"
068: #define ALT_STDIN_BASE 0x01001040
069: #define ALT_STDIN_DEV jtag_uart
070: #define ALT_STDIN_PRESENT
071: #define ALT_STDOUT "/dev/jtag_uart"
072: #define ALT_STDOUT_TYPE "altera_avalon_jtag_uart"
073: #define ALT_STDOUT_BASE 0x01001040
074: #define ALT_STDOUT_DEV jtag_uart
075: #define ALT_STDOUT_PRESENT
076: #define ALT_STDERR "/dev/jtag_uart"
077: #define ALT_STDERR_TYPE "altera_avalon_jtag_uart"
078: #define ALT_STDERR_BASE 0x01001040
079: #define ALT_STDERR_DEV jtag_uart
080: #define ALT_STDERR_PRESENT
081: #define ALT_CPU_FREQ 50000000
082: #define ALT_IRQ_BASE NULL
083: 
084: /*
085:  * processor configuration
086:  *
087:  */
088: 
089: #define NIOS2_CPU_IMPLEMENTATION "fast"
090: #define NIOS2_BIG_ENDIAN 0
091: 
092: #define NIOS2_ICACHE_SIZE 4096
093: #define NIOS2_DCACHE_SIZE 2048
094: #define NIOS2_ICACHE_LINE_SIZE 32
095: #define NIOS2_ICACHE_LINE_SIZE_LOG2 5
096: #define NIOS2_DCACHE_LINE_SIZE 32
097: #define NIOS2_DCACHE_LINE_SIZE_LOG2 5
098: #define NIOS2_FLUSHDA_SUPPORTED
099: 
100: #define NIOS2_EXCEPTION_ADDR 0x00800020
101: #define NIOS2_RESET_ADDR 0x00800000
102: #define NIOS2_BREAK_ADDR 0x01000820
103: 
104: #define NIOS2_HAS_DEBUG_STUB
105: 
106: #define NIOS2_CPU_ID_SIZE 1
107: #define NIOS2_CPU_ID_VALUE 0
108: 
109: /*
110:  * A define for each class of peripheral
111:  *
112:  */
113: 
114: #define __ALTERA_AVALON_NEW_SDRAM_CONTROLLER
115: #define __ALTERA_AVALON_TIMER
116: #define __ALTERA_AVALON_JTAG_UART
117: #define __ALTERA_AVALON_PIO
118: #define __ALTERA_AVALON_LCD_16207
119: 
120: /*
121:  * sdram configuration
122:  *
123:  */
124: 
125: #define SDRAM_NAME "/dev/sdram"
126: #define SDRAM_TYPE "altera_avalon_new_sdram_controller"
127: #define SDRAM_BASE 0x00800000
128: #define SDRAM_SPAN 8388608
129: #define SDRAM_REGISTER_DATA_IN 1
130: #define SDRAM_SIM_MODEL_BASE 0
131: #define SDRAM_SDRAM_DATA_WIDTH 16
132: #define SDRAM_SDRAM_ADDR_WIDTH 12
133: #define SDRAM_SDRAM_ROW_WIDTH 12
134: #define SDRAM_SDRAM_COL_WIDTH 8
135: #define SDRAM_SDRAM_NUM_CHIPSELECTS 1
136: #define SDRAM_SDRAM_NUM_BANKS 4
137: #define SDRAM_REFRESH_PERIOD 15.625
138: #define SDRAM_POWERUP_DELAY 100.0
139: #define SDRAM_CAS_LATENCY 3
140: #define SDRAM_T_RFC 70.0
141: #define SDRAM_T_RP 20.0
142: #define SDRAM_T_MRD 3
143: #define SDRAM_T_RCD 20.0
144: #define SDRAM_T_AC 5.5
145: #define SDRAM_T_WR 14.0
146: #define SDRAM_INIT_REFRESH_COMMANDS 2
147: #define SDRAM_INIT_NOP_DELAY 0.0
148: #define SDRAM_SHARED_DATA 0
149: #define SDRAM_SDRAM_BANK_WIDTH 2
150: #define SDRAM_TRISTATE_BRIDGE_SLAVE ""
151: #define SDRAM_STARVATION_INDICATOR 0
152: #define SDRAM_IS_INITIALIZED 1
153: #define ALT_MODULE_CLASS_sdram altera_avalon_new_sdram_controller
154: 
155: /*
156:  * timer configuration
157:  *
158:  */
159: 
160: #define TIMER_NAME "/dev/timer"
161: #define TIMER_TYPE "altera_avalon_timer"
162: #define TIMER_BASE 0x01001000
163: #define TIMER_SPAN 32
164: #define TIMER_IRQ 0
165: #define TIMER_ALWAYS_RUN 0
166: #define TIMER_FIXED_PERIOD 0
167: #define TIMER_SNAPSHOT 1
168: #define TIMER_PERIOD 1.0
169: #define TIMER_PERIOD_UNITS "ms"
170: #define TIMER_RESET_OUTPUT 0
171: #define TIMER_TIMEOUT_PULSE_OUTPUT 0
172: #define TIMER_LOAD_VALUE 49999
173: #define TIMER_MULT 0.001
174: #define TIMER_FREQ 50000000
175: #define ALT_MODULE_CLASS_timer altera_avalon_timer
176: 
177: /*
178:  * jtag_uart configuration
179:  *
180:  */
181: 
182: #define JTAG_UART_NAME "/dev/jtag_uart"
183: #define JTAG_UART_TYPE "altera_avalon_jtag_uart"
184: #define JTAG_UART_BASE 0x01001040
185: #define JTAG_UART_SPAN 8
186: #define JTAG_UART_IRQ 1
187: #define JTAG_UART_WRITE_DEPTH 64
188: #define JTAG_UART_READ_DEPTH 64
189: #define JTAG_UART_WRITE_THRESHOLD 8
190: #define JTAG_UART_READ_THRESHOLD 8
191: #define JTAG_UART_READ_CHAR_STREAM ""
192: #define JTAG_UART_SHOWASCII 1
193: #define JTAG_UART_READ_LE 0
194: #define JTAG_UART_WRITE_LE 0
195: #define JTAG_UART_ALTERA_SHOW_UNRELEASED_JTAG_UART_FEATURES 0
196: #define ALT_MODULE_CLASS_jtag_uart altera_avalon_jtag_uart
197: 
198: /*
199:  * pio configuration
200:  *
201:  */
202: 
203: #define PIO_NAME "/dev/pio"
204: #define PIO_TYPE "altera_avalon_pio"
205: #define PIO_BASE 0x01001020
206: #define PIO_SPAN 16
207: #define PIO_IRQ 2
208: #define PIO_DO_TEST_BENCH_WIRING 1
209: #define PIO_DRIVEN_SIM_VALUE 0
210: #define PIO_HAS_TRI 0
211: #define PIO_HAS_OUT 1
212: #define PIO_HAS_IN 1
213: #define PIO_CAPTURE 1
214: #define PIO_DATA_WIDTH 32
215: #define PIO_EDGE_TYPE "RISING"
216: #define PIO_IRQ_TYPE "EDGE"
217: #define PIO_BIT_CLEARING_EDGE_REGISTER 0
218: #define PIO_FREQ 50000000
219: #define ALT_MODULE_CLASS_pio altera_avalon_pio
220: 
221: /*
222:  * lcd configuration
223:  *
224:  */
225: 
226: #define LCD_NAME "/dev/lcd"
227: #define LCD_TYPE "altera_avalon_lcd_16207"
228: #define LCD_BASE 0x01001030
229: #define LCD_SPAN 16
230: #define ALT_MODULE_CLASS_lcd altera_avalon_lcd_16207
231: 
232: /*
233:  * system library configuration
234:  *
235:  */
236: 
237: #define ALT_MAX_FD 32
238: #define ALT_SYS_CLK TIMER
239: #define ALT_TIMESTAMP_CLK none
240: 
241: /*
242:  * Devices associated with code sections.
243:  *
244:  */
245: 
246: #define ALT_TEXT_DEVICE       SDRAM
247: #define ALT_RODATA_DEVICE     SDRAM
248: #define ALT_RWDATA_DEVICE     SDRAM
249: #define ALT_EXCEPTIONS_DEVICE SDRAM
250: #define ALT_RESET_DEVICE      SDRAM
251: 
252: /*
253:  * The text section is initialised so no bootloader will be required.
254:  * Set a variable to tell crt0.S to provide code at the reset address and
255:  * to initialise rwdata if appropriate.
256:  */
257: 
258: #define ALT_NO_BOOTLOADER
259: 
260: 
261: #endif /* __SYSTEM_H_ */