ALU Test

alu.v

/*
*   control:
*    000  add, signed
*    001  subtract, signed
*    010  add, unsigned
*    011  subtract, unsigned
* --------------------------------------------
*    100  AND
*    101  OR
*    110  XOR
*    111  NOR
*/  
module alu(a,b,control,c,zero,neg,ovfl,ce,test);
parameter BITS = 3;
input [BITS-1:0] a, b;
input [2:0] control;
output [BITS-1:0] c;
output [BITS:0] ce;
output zero, neg, ovfl, test;

wire [BITS:0] ae,be;
assign ae = {a[BITS-1],a};
assign be = {b[BITS-1],b};
assign ce = (subtract?ae-be:ae+be);
assign test = ce != {sum[BITS-1],sum};

wire subtract;
assign subtract = control[0];

// add-subtract unit
wire [BITS-1:0] sum;
wire [BITS-1:0] bn;
wire cin, cout;
assign cin = subtract;
assign bn = (subtract? ~b: b);
assign {cout, sum} = a+bn+cin;

// logic unit
reg [BITS-1:0] out;
always
    case (control[1:0])
    2'b00: out = a&b;
    2'b01: out = a|b;
    2'b10: out = a^b;
    2'b11: out = ~(a|b);
    endcase

wire zero, sgn, unsgn;
assign zero = ~(|sum);
assign sgn  = (sum[BITS-1]? (~a[BITS-1])&(~bn[BITS-1]): a[BITS-1]&bn[BITS-1] );
assign unsgn = cout^subtract;
assign ovfl = (control[1]? unsgn: sgn);
assign neg = (control[1]? unsgn: sum[BITS-1]);

assign c = (control[2]? out: sum);

endmodule

Quartus Compilation Summary

fit.summary

Fitter Status : Successful - Tue Sep 16 21:45:48 2008
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Web Edition
Revision Name : alu
Top-level Entity Name : alu
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 30 / 33,216 ( < 1 % )
    Total combinational functions : 30 / 33,216 ( < 1 % )
    Dedicated logic registers : 0 / 33,216 ( 0 % )
Total registers : 0
Total pins : 20 / 475 ( 4 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )

tan.summary

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Timing Analyzer Summary
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Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 12.850 ns
From           : control[0]
To             : ovfl
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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