Project: bin2bcd

bin2bcd.v

module bin2bcd(input [7:0] A, output [9:0] BCD);
wire [3:0] c1,c2,c3,c4,c5,c6,c7;
wire [3:0] d1,d2,d3,d4,d5,d6,d7;

assign d1 = {1'b0,A[7:5]};
assign d2 = {c1[2:0],A[4]};
assign d3 = {c2[2:0],A[3]};
assign d4 = {c3[2:0],A[2]};
assign d5 = {c4[2:0],A[1]};
assign d6 = {1'b0,c1[3],c2[3],c3[3]};
assign d7 = {c6[2:0],c4[3]};
add3 m1(d1,c1);
add3 m2(d2,c2);
add3 m3(d3,c3);
add3 m4(d4,c4);
add3 m5(d5,c5);
add3 m6(d6,c6);
add3 m7(d7,c7);
assign BCD[3:0] = {c5[2:0],A[0]};
assign BCD[7:4] = {c7[2:0],c5[3]};
assign BCD[9:8] = {c6[3],c7[3]};

endmodule

add3.v

module add3(in,out);
input [3:0] in;
output [3:0] out;
reg [3:0] out;

always @ (in)
    case (in)
    4'b0000: out <= 4'b0000;
    4'b0001: out <= 4'b0001;
    4'b0010: out <= 4'b0010;
    4'b0011: out <= 4'b0011;
    4'b0100: out <= 4'b0100;
    4'b0101: out <= 4'b1000;
    4'b0110: out <= 4'b1001;
    4'b0111: out <= 4'b1010;
    4'b1000: out <= 4'b1011;
    4'b1001: out <= 4'b1100;
    default: out <= 4'b0000;
    endcase
endmodule

Quartus Compilation Summary

fit.summary

Fitter Status : Successful - Mon Oct 17 21:14:36 2011
Quartus II Version : 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition
Revision Name : bin2bcd
Top-level Entity Name : bin2bcd
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 33 / 33,216 ( < 1 % )
    Total combinational functions : 33 / 33,216 ( < 1 % )
    Dedicated logic registers : 0 / 33,216 ( 0 % )
Total registers : 0
Total pins : 18 / 475 ( 4 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )

tan.summary

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Timing Analyzer Summary
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Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 15.007 ns
From           : A[5]
To             : BCD[1]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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