- Implement the circuit of Figure 4-13 in Verilog. Simulate (and verify by hand) the cases described in textbook problem 4-13.
- Do textbook problems 4-15, 4-16, and 4-17.
- Do textbook problem 4-20 in gate-level Verilog and simulate several test cases.
- Do textbook problem 4-43.
- Do textbook problems 5-1 and 5-2 (flipflop design)
- Do textbook problems 5-3, 5-4 and 5-5 (flipflop description).

Maintained by John Loomis,
last updated *26 June 2005 *