The objective of this assignment is to verify that each class member can do the following:
The supporting files for each project should be packaged in a separate folder. The contents of Quartus folders should have non-essential files removed. DE2 projects should retain the .sof file. You should use qdoc to document Quartus projects. The folders should contain all necessary files required to launch and compile a Quartus project with a single "Start Compilation" action.
You should produce a Word document describing the basic objectives, design elements, and results of simulation (if appropriate). This narrative should have meaningful figures and extractions of Verilog code. The report should not contain raw, uninterpreted computer output.
Maintained by John Loomis, last updated 8 September 2009