/*
 * "Hello World" example.
 *
 * This example prints 'Hello from Nios II' to the STDOUT stream. It runs on
 * the Nios II 'standard', 'full_featured', 'fast', and 'low_cost' example
 * designs. It runs with or without the MicroC/OS-II RTOS and requires a STDOUT
 * device in your system's hardware.
 * The memory footprint of this hosted application is ~69 kbytes by default
 * using the standard reference design.
 *
 * For a reduced footprint version of this template, and an explanation of how
 * to reduce the memory footprint for a given application, see the
 * "small_hello_world" template.
 *
 */

#include <stdio.h>

int main()
{
  printf("Hello from Nios II!\n");

  return 0;
}

Size

   text       data        bss        dec        hex    filename
  50956       6996        532      58484       e474    hello_world_0.elf

Sections

There are 21 section headers, starting at offset 0x544ac:

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
  [ 1] .entry            PROGBITS        00800000 000074 000020 00  AX  0   0 32
  [ 2] .exceptions       PROGBITS        00800020 000094 0001a8 00  AX  0   0  4
  [ 3] .text             PROGBITS        008001c8 00023c 00bed8 00  AX  0   0  4
  [ 4] .rodata           PROGBITS        0080c0a0 00c114 00066c 00   A  0   0  4
  [ 5] .rwdata           PROGBITS        0080c70c 00c780 001b54 00 WAp  0   0  4
  [ 6] .bss              NOBITS          0080e260 00e2d4 000214 00 WAp  0   0  4
  [ 7] .sdram            PROGBITS        0080e474 00e2d4 000000 00   W  0   0  1
  [ 8] .comment          PROGBITS        00000000 00e2d4 0011b4 00      0   0  1
  [ 9] .debug_aranges    PROGBITS        00000000 00f488 000c98 00      0   0  8
  [10] .debug_pubnames   PROGBITS        00000000 010120 001228 00      0   0  1
  [11] .debug_info       PROGBITS        00000000 011348 022912 00      0   0  1
  [12] .debug_abbrev     PROGBITS        00000000 033c5a 007643 00      0   0  1
  [13] .debug_line       PROGBITS        00000000 03b29d 0151ef 00      0   0  1
  [14] .debug_frame      PROGBITS        00000000 05048c 001728 00      0   0  4
  [15] .debug_str        PROGBITS        00000000 051bb4 00222f 00      0   0  1
  [16] .debug_alt_sim_in PROGBITS        00000000 053de4 000060 00      0   0  4
  [17] .debug_ranges     PROGBITS        00000060 053e44 000590 00      0   0  1
  [18] .shstrtab         STRTAB          00000000 0543d4 0000d8 00      0   0  1
  [19] .symtab           SYMTAB          00000000 0547f4 0018b0 10     20  c0  4
  [20] .strtab           STRTAB          00000000 0560a4 0011f0 00      0   0  1
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

Elf file type is EXEC (Executable file)
Entry point 0x8001c8
There are 2 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x000074 0x00800000 0x00800000 0x0c70c 0x0c70c R E 0x1
  LOAD           0x00c780 0x0080c70c 0x0080c70c 0x01b54 0x01d68 RW  0x1

 Section to Segment mapping:
  Segment Sections...
   00     .entry .exceptions .text .rodata 
   01     .rwdata .bss 

Symbols

Data Section Contents

rodata

Hex dump of section '.rodata':
  0x0080c0a0 20736f69 4e206d6f 7266206f 6c6c6548 Hello from Nios 
  0x0080c0b0 20202020 20202020 00000000 0a214949 II!.....        
  0x0080c0c0 30303030 30303030 20202020 20202020         00000000
  ...

Disassembly

00800000 <__reset>:
    /* Assume the instruction cache size is always a power of two. */
#if NIOS2_ICACHE_SIZE > 0x8000
    movhi r2, %hi(NIOS2_ICACHE_SIZE)
#else
    movui r2, NIOS2_ICACHE_SIZE
  800000:    00840014     movui    r2,4096
#endif

0:
    initi r2
  800004:    1001483a     initi    r2
    addi r2, r2, -NIOS2_ICACHE_LINE_SIZE
  800008:    10bff804     addi    r2,r2,-32
    bgt r2, zero, 0b
  80000c:    00bffd16     blt    zero,r2,800004 <__alt_mem_sdram+0x4>
1:

    /*
     * The following debug information tells the ISS not to run the loop above
     * but to perform its actions using faster internal code.
     */
    .pushsection .debug_alt_sim_info
    .int 1, 1, 0b, 1b
    .popsection
#endif /* Initialize Instruction Cache */

/*
 * Jump to the _start entry point in the .text section if reset code
 * is allowed or if optimizing for RTL simulation.
 */
#if defined(ALT_ALLOW_CODE_AT_RESET) || defined(ALT_SIM_OPTIMIZE)
    /* Jump to the _start entry point in the .text section. */
    movhi r1, %hi(_start)
  800010:    00402034     movhi    at,128
    ori r1, r1, %lo(_start)
  800014:    08407214     ori    at,at,456
    jmp r1
  800018:    0800683a     jmp    at
  80001c:    00000000     call    0 <__alt_mem_sdram-0x800000>

00800020 <alt_exception>:
         * caller saved registers on the stack (See the Nios2 ABI
         * documentation for details).
         */

        addi  sp, sp, -76
  800020:    deffed04     addi    sp,sp,-76

#ifdef ALT_STACK_CHECK

        bltu  sp, et, .Lstack_overflow

#endif

#endif

        stw   ra,  0(sp)
  800024:    dfc00015     stw    ra,0(sp)

        /*
         * Leave a gap in the stack frame at 4(sp) for the muldiv handler to
         * store zero into.
         */

        stw   r1,   8(sp)
  800028:    d8400215     stw    at,8(sp)
        stw   r2,  12(sp)
  80002c:    d8800315     stw    r2,12(sp)
        stw   r3,  16(sp)
  800030:    d8c00415     stw    r3,16(sp)
        stw   r4,  20(sp)
  800034:    d9000515     stw    r4,20(sp)
        stw   r5,  24(sp)
  800038:    d9400615     stw    r5,24(sp)
        stw   r6,  28(sp)
  80003c:    d9800715     stw    r6,28(sp)
        stw   r7,  32(sp)
  800040:    d9c00815     stw    r7,32(sp)

        rdctl r5, estatus
  800044:    000b307a     rdctl    r5,estatus

        stw   r8,  36(sp)
  800048:    da000915     stw    r8,36(sp)
        stw   r9,  40(sp)
  80004c:    da400a15     stw    r9,40(sp)
        stw   r10, 44(sp)
  800050:    da800b15     stw    r10,44(sp)
        stw   r11, 48(sp)
  800054:    dac00c15     stw    r11,48(sp)
        stw   r12, 52(sp)
  800058:    db000d15     stw    r12,52(sp)
        stw   r13, 56(sp)
  80005c:    db400e15     stw    r13,56(sp)
        stw   r14, 60(sp)
  800060:    db800f15     stw    r14,60(sp)
        stw   r15, 64(sp)
  800064:    dbc01015     stw    r15,64(sp)

        /*
         * ea-4 contains the address of the instruction being executed
         * when the exception occured. For interrupt exceptions, we will
         * will be re-issue the isntruction. Store it in 72(sp)
         */
        stw   r5,  68(sp)  /* estatus */
  800068:    d9401115     stw    r5,68(sp)
        addi  r15, ea, -4  /* instruction that caused exception */
  80006c:    ebffff04     addi    r15,ea,-4
        stw   r15,  72(sp)
  800070:    dbc01215     stw    r15,72(sp)
        /*
         * Test to see if the exception was a software exception or caused 
         * by an external interrupt, and vector accordingly.
         */
        rdctl r4, ipending
  800074:    0009313a     rdctl    r4,ipending
        andi  r2, r5, 1
  800078:    2880004c     andi    r2,r5,1
        beq   r2, zero, .Lnot_irq
  80007c:    10000326     beq    r2,zero,80008c <__ram_exceptions_start+0x6c>
        beq   r4, zero, .Lnot_irq
  800080:    20000226     beq    r4,zero,80008c <__ram_exceptions_start+0x6c>
#endif /* ALT_CI_INTERRUPT_VECTOR_N */

        .section .exceptions.irqhandler, "xa"
        /*
         * Now that all necessary registers have been preserved, call 
         * alt_irq_handler() to process the interrupts.
         */

        call alt_irq_handler
  800084:    08000ec0     call    8000ec <alt_irq_handler>

        .section .exceptions.irqreturn, "xa"

        br    .Lexception_exit
  800088:    00000306     br    800098 <__ram_exceptions_start+0x78>

        /*
         * The interrupt testing code (.exceptions.irqtest) will be
         * linked here here. If an interrupt is active, it calls the HAL
         * IRQ handler (alt_irq_handler()) which successively calls
         * registered interrupt handler(s) until no interrupts remain
         * pending. It then jumps to .exceptions.exit. If there is no
         * interrupt then it continues to .exception.notirq, below.
         */

        .section .exceptions.notirq, "xa"

        /*
         * Prepare to service unimplemtned instructions or traps,
         * each of which is optionally inked into section .exceptions.soft,
         * which will preceed .exceptions.unknown below.
         *
         * Unlike interrupts, we want to skip the exception-causing instructon
         * upon completion, so we write ea (address of instruction *after*
         * the one where the exception occured) into 72(sp). The actual
         * instruction that caused the exception is written in r2, which these
         * handlers will utilize.
         */
        stw   ea,  72(sp)  /* Don't re-issue */
  80008c:    df401215     stw    ea,72(sp)
        ldw   r2, -4(ea)   /* Instruction that caused exception */
  800090:    e8bfff17     ldw    r2,-4(ea)

        /*
         * Other exception handling code, if enabled, will be linked here.
         * This includes unimplemted (multiply/divide) instruction support
         * (a BSP generaton option), and a trap handler (that would typically
         * be augmented with user-specific code). These are not linked in by
         * default.
         */

        /*
         * In the context of linker sections, "unknown" are all exceptions
         * not handled by the built-in handlers above (interupt, and trap or
         * unimplemented instruction decoding, if enabled).
         *
         * Advanced exception types can be serviced by registering a handler.
         * To do so, enable the "Enable Instruction-related Exception API" HAL
         * BSP setting. If this setting is disabled, this handler code will
         * either break (if the debug core is present) or enter an infinite
         * loop because we don't how how to handle the exception.
         */
        .section .exceptions.unknown
#ifdef ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API
        /*
         * The C-based HAL routine alt_instruction_exception_entry() will
         * attempt to service the exception by calling a user-registered
         * exception handler using alt_instruction_exception_register().
         * If no handler was registered it will either break (if the
         * debugger is present) or go into an infinite loop since the
         * handling behavior is undefined; in that case we will not return here.
         */

        /* Load exception-causing address as first argument (r4) */
        addi   r4, ea, -4

        /* Call the instruction-exception entry */
        call   alt_instruction_exception_entry

        /*
         * If alt_instruction_exception_entry() returned, the exception was
         * serviced by a user-registered routine. Its return code (now in r2)
         * indicates whether to re-issue or skip the exception-causing
         * instruction
         *
         * Return code was 0: Skip. The instruction after the exception is
         * already stored in 72(sp).
         */
        bne   r2, r0, .Lexception_exit

        /*
         * Otherwise, modify 72(sp) to re-issue the instruction that caused the
         * exception.
         */
        addi  r15, ea, -4  /* instruction that caused exception */
        stw   r15,  72(sp)

#else /* ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API disabled */

        /*
         * We got here because an instruction-related exception occured, but the
         * handler API was not compiled in. We do not presume to know how to
         * handle it. If the debugger is present, break, otherwise hang.
         *
         *  If you get here then one of the following could have happened:
         *
         *  - An instruction-generated exception occured, and the processor
         *    does not have the extra exceptions feature enabled, or you
         *    have not registered a handler using
         *    alt_instruction_exception_register()
         *
         *  Some examples of instruction-generated exceptions and why they
         *  might occur:
         *
         *  - Your program could have been compiled for a full-featured
         *    Nios II core, but it is running on a smaller core, and
         *    instruction emulation has been disabled by defining
         *    ALT_NO_INSTRUCTION_EMULATION.
         *
         *    You can work around the problem by re-enabling instruction
         *    emulation, or you can figure out why your program is being
         *    compiled for a system other than the one that it is running on.
         *
         *  - Your program has executed a trap instruction, but has not
         *    implemented a handler for this instruction.
         *
         *  - Your program has executed an illegal instruction (one which is
         *    not defined in the instruction set).
         *
         *  - Your processor includes an MMU or MPU, and you have enabled it
         *    before registering an exception handler to service exceptions it
         *    generates.
         *
         * The problem could also be hardware related:
         *  - If your hardware is broken and is generating spurious interrupts
         *    (a peripheral which negates its interrupt output before its
         *    interrupt handler has been executed will cause spurious
         *    interrupts)
         */
#ifdef NIOS2_HAS_DEBUG_STUB
       /*
        *  Either tell the user now (if there is a debugger attached) or go into
        *  the debug monitor which will loop until a debugger is attached.
        */
        break
  800094:    003da03a     break    0
#else
       /*
        *  If there is no debug stub then a BREAK will probably cause a reboot.
        *  An infinate loop will probably be more useful.
        */
0:
        br   0b
#endif /* NIOS2_HAS_DEBUG_STUB */

#endif /* ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API */

        .section .exceptions.exit.label
.Lexception_exit:

        .section .exceptions.exit, "xa"

        /* 
         * Restore the saved registers, so that all general purpose registers 
         * have been restored to their state at the time the interrupt occured.
         */

        ldw   r5,  68(sp)
  800098:    d9401117     ldw    r5,68(sp)
        ldw   ea,  72(sp)  /* This becomes the PC once eret is executed */
  80009c:    df401217     ldw    ea,72(sp)
        ldw   ra,   0(sp)
  8000a0:    dfc00017     ldw    ra,0(sp)

        wrctl estatus, r5
  8000a4:    2801707a     wrctl    estatus,r5

        ldw   r1,   8(sp)
  8000a8:    d8400217     ldw    at,8(sp)
        ldw   r2,  12(sp)
  8000ac:    d8800317     ldw    r2,12(sp)
        ldw   r3,  16(sp)
  8000b0:    d8c00417     ldw    r3,16(sp)
        ldw   r4,  20(sp)
  8000b4:    d9000517     ldw    r4,20(sp)
        ldw   r5,  24(sp)
  8000b8:    d9400617     ldw    r5,24(sp)
        ldw   r6,  28(sp)
  8000bc:    d9800717     ldw    r6,28(sp)
        ldw   r7,  32(sp)
  8000c0:    d9c00817     ldw    r7,32(sp)

#ifdef ALT_EXCEPTION_STACK
#ifdef ALT_STACK_CHECK
        ldw   et, %gprel(alt_exception_old_stack_limit)(gp)
#endif
#endif

        ldw   r8,  36(sp)
  8000c4:    da000917     ldw    r8,36(sp)
        ldw   r9,  40(sp)
  8000c8:    da400a17     ldw    r9,40(sp)
        ldw   r10, 44(sp)
  8000cc:    da800b17     ldw    r10,44(sp)
        ldw   r11, 48(sp)
  8000d0:    dac00c17     ldw    r11,48(sp)
        ldw   r12, 52(sp)
  8000d4:    db000d17     ldw    r12,52(sp)
        ldw   r13, 56(sp)
  8000d8:    db400e17     ldw    r13,56(sp)
        ldw   r14, 60(sp)
  8000dc:    db800f17     ldw    r14,60(sp)
        ldw   r15, 64(sp)
  8000e0:    dbc01017     ldw    r15,64(sp)

#ifdef ALT_EXCEPTION_STACK

#ifdef ALT_STACK_CHECK
        stw   et, %gprel(alt_stack_limit_value)(gp)
        stw   zero, %gprel(alt_exception_old_stack_limit)(gp)
#endif

        ldw   sp,  76(sp)

#else
        addi  sp, sp, 76
  8000e4:    dec01304     addi    sp,sp,76

#endif

        /*
         * Return to the interrupted instruction.
         */

        eret
  8000e8:    ef80083a     eret

008000ec <alt_irq_handler>:
 */

void alt_irq_handler (void) __attribute__ ((section (".exceptions")));
void alt_irq_handler (void)
{
  8000ec:    defff904     addi    sp,sp,-28
  8000f0:    dfc00615     stw    ra,24(sp)
  8000f4:    df000515     stw    fp,20(sp)
  8000f8:    df000504     addi    fp,sp,20
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void)
{
  alt_u32 active;

  NIOS2_READ_IPENDING (active);
  8000fc:    0005313a     rdctl    r2,ipending
  800100:    e0bfff15     stw    r2,-4(fp)
  800104:    e0bfff17     ldw    r2,-4(fp)
  800108:    e0bffe15     stw    r2,-8(fp)
  80010c:    e0bffe17     ldw    r2,-8(fp)
  800110:    e0bffb15     stw    r2,-20(fp)
#ifdef ALT_CI_INTERRUPT_VECTOR
  alt_32 offset;
  char*  alt_irq_base = (char*)alt_irq;
#else
  alt_u32 active;
  alt_u32 mask;
  alt_u32 i;
#endif /* ALT_CI_INTERRUPT_VECTOR */
  
  /*
   * Notify the operating system that we are at interrupt level.
   */ 
  
  ALT_OS_INT_ENTER();

#ifdef ALT_CI_INTERRUPT_VECTOR
  /*
   * Call the interrupt vector custom instruction using the 
   * ALT_CI_INTERRUPT_VECTOR macro.
   * It returns the offset into the vector table of the lowest-valued pending
   * interrupt (corresponds to highest priority) or a negative value if none.
   * The custom instruction assumes that each table entry is eight bytes.
   */
  while ((offset = ALT_CI_INTERRUPT_VECTOR) >= 0) {
    struct ALT_IRQ_HANDLER* handler_entry = 
      (struct ALT_IRQ_HANDLER*)(alt_irq_base + offset);

    handler_entry->handler(handler_entry->context, offset >> 3);
  }
#else
  /* 
   * Obtain from the interrupt controller a bit list of pending interrupts,
   * and then process the highest priority interrupt. This process loops, 
   * loading the active interrupt list on each pass until alt_irq_pending() 
   * return zero.
   * 
   * The maximum interrupt latency for the highest priority interrupt is
   * reduced by finding out which interrupts are pending as late as possible.
   * Consider the case where the high priority interupt is asserted during
   * the interrupt entry sequence for a lower priority interrupt to see why
   * this is the case.
   */

  active = alt_irq_pending ();

  do
  {
    i = 0;
  800114:    e03ffd15     stw    zero,-12(fp)
    mask = 1;
  800118:    00800044     movi    r2,1
  80011c:    e0bffc15     stw    r2,-16(fp)

    /*
     * Test each bit in turn looking for an active interrupt. Once one is 
     * found, the interrupt handler asigned by a call to alt_irq_register() is
     * called to clear the interrupt condition.
     */

    do
    {
      if (active & mask)
  800120:    e0fffb17     ldw    r3,-20(fp)
  800124:    e0bffc17     ldw    r2,-16(fp)
  800128:    1884703a     and    r2,r3,r2
  80012c:    1005003a     cmpeq    r2,r2,zero
  800130:    1000101e     bne    r2,zero,800174 <alt_irq_handler+0x88>
      { 
        alt_irq[i].handler(alt_irq[i].context, i); 
  800134:    00c02074     movhi    r3,129
  800138:    18f89a04     addi    r3,r3,-7576
  80013c:    e0bffd17     ldw    r2,-12(fp)
  800140:    10800224     muli    r2,r2,8
  800144:    10c9883a     add    r4,r2,r3
  800148:    00c02074     movhi    r3,129
  80014c:    18f89a04     addi    r3,r3,-7576
  800150:    e0bffd17     ldw    r2,-12(fp)
  800154:    10800224     muli    r2,r2,8
  800158:    10c5883a     add    r2,r2,r3
  80015c:    10800104     addi    r2,r2,4
  800160:    20c00017     ldw    r3,0(r4)
  800164:    11000017     ldw    r4,0(r2)
  800168:    e17ffd17     ldw    r5,-12(fp)
  80016c:    183ee83a     callr    r3
        break;
  800170:    00000706     br    800190 <alt_irq_handler+0xa4>
      }
      mask <<= 1;
  800174:    e0bffc17     ldw    r2,-16(fp)
  800178:    1085883a     add    r2,r2,r2
  80017c:    e0bffc15     stw    r2,-16(fp)
      i++;
  800180:    e0bffd17     ldw    r2,-12(fp)
  800184:    10800044     addi    r2,r2,1
  800188:    e0bffd15     stw    r2,-12(fp)

    } while (1);
  80018c:    003fe406     br    800120 <alt_irq_handler+0x34>
static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void)
{
  alt_u32 active;

  NIOS2_READ_IPENDING (active);
  800190:    0005313a     rdctl    r2,ipending
  800194:    e0bffe15     stw    r2,-8(fp)
  800198:    e0bffe17     ldw    r2,-8(fp)
  80019c:    e0bfff15     stw    r2,-4(fp)
  8001a0:    e0bfff17     ldw    r2,-4(fp)
  8001a4:    e0bffb15     stw    r2,-20(fp)

    active = alt_irq_pending ();
    
  } while (active);
  8001a8:    e0bffb17     ldw    r2,-20(fp)
  8001ac:    1005003a     cmpeq    r2,r2,zero
  8001b0:    1000011e     bne    r2,zero,8001b8 <alt_irq_handler+0xcc>
  8001b4:    003fd706     br    800114 <alt_irq_handler+0x28>
#endif /* ALT_CI_INTERRUPT_VECTOR */

  /*
   * Notify the operating system that interrupt processing is complete.
   */ 

  ALT_OS_INT_EXIT();
}
  8001b8:    dfc00617     ldw    ra,24(sp)
  8001bc:    df000517     ldw    fp,20(sp)
  8001c0:    dec00704     addi    sp,sp,28
  8001c4:    f800283a     ret