system.h
/* system.h * * Machine generated for a CPU named "cpu" as defined in: * c:\projects\nios2lab1\hello_world_small_0\hello_world_small_0_syslib\..\..\cpu1.ptf * * Generated: 2008-01-16 13:35:54.39 * */ #ifndef __SYSTEM_H_ #define __SYSTEM_H_ /* DO NOT MODIFY THIS FILE Changing this file will have subtle consequences which will almost certainly lead to a nonfunctioning system. If you do modify this file, be aware that your changes will be overwritten and lost when this file is generated again. DO NOT MODIFY THIS FILE */ /****************************************************************************** * * * License Agreement * * * * Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * * All rights reserved. * * * * Permission is hereby granted, free of charge, to any person obtaining a * * copy of this software and associated documentation files (the "Software"), * * to deal in the Software without restriction, including without limitation * * the rights to use, copy, modify, merge, publish, distribute, sublicense, * * and/or sell copies of the Software, and to permit persons to whom the * * Software is furnished to do so, subject to the following conditions: * * * * The above copyright notice and this permission notice shall be included in * * all copies or substantial portions of the Software. * * * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * * DEALINGS IN THE SOFTWARE. * * * * This agreement shall be governed in all respects by the laws of the State * * of California and by the laws of the United States of America. * * * ******************************************************************************/ /* * system configuration * */ #define ALT_SYSTEM_NAME "cpu1" #define ALT_CPU_NAME "cpu" #define ALT_CPU_ARCHITECTURE "altera_nios2" #define ALT_DEVICE_FAMILY "CYCLONEII" #define ALT_STDIN "/dev/jtag_uart" #define ALT_STDIN_TYPE "altera_avalon_jtag_uart" #define ALT_STDIN_BASE 0x00011030 #define ALT_STDIN_DEV jtag_uart #define ALT_STDIN_PRESENT #define ALT_STDOUT "/dev/jtag_uart" #define ALT_STDOUT_TYPE "altera_avalon_jtag_uart" #define ALT_STDOUT_BASE 0x00011030 #define ALT_STDOUT_DEV jtag_uart #define ALT_STDOUT_PRESENT #define ALT_STDERR "/dev/jtag_uart" #define ALT_STDERR_TYPE "altera_avalon_jtag_uart" #define ALT_STDERR_BASE 0x00011030 #define ALT_STDERR_DEV jtag_uart #define ALT_STDERR_PRESENT #define ALT_CPU_FREQ 50000000 #define ALT_IRQ_BASE NULL /* * processor configuration * */ #define NIOS2_CPU_IMPLEMENTATION "fast" #define NIOS2_BIG_ENDIAN 0 #define NIOS2_ICACHE_SIZE 4096 #define NIOS2_DCACHE_SIZE 2048 #define NIOS2_ICACHE_LINE_SIZE 32 #define NIOS2_ICACHE_LINE_SIZE_LOG2 5 #define NIOS2_DCACHE_LINE_SIZE 32 #define NIOS2_DCACHE_LINE_SIZE_LOG2 5 #define NIOS2_FLUSHDA_SUPPORTED #define NIOS2_EXCEPTION_ADDR 0x00008020 #define NIOS2_RESET_ADDR 0x00008000 #define NIOS2_BREAK_ADDR 0x00010820 #define NIOS2_HAS_DEBUG_STUB #define NIOS2_CPU_ID_SIZE 1 #define NIOS2_CPU_ID_VALUE 0 /* * A define for each class of peripheral * */ #define __ALTERA_AVALON_ONCHIP_MEMORY2 #define __ALTERA_AVALON_TIMER #define __ALTERA_AVALON_PIO #define __ALTERA_AVALON_JTAG_UART /* * onchip_mem configuration * */ #define ONCHIP_MEM_NAME "/dev/onchip_mem" #define ONCHIP_MEM_TYPE "altera_avalon_onchip_memory2" #define ONCHIP_MEM_BASE 0x00008000 #define ONCHIP_MEM_SPAN 32768 #define ONCHIP_MEM_ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE 0 #define ONCHIP_MEM_RAM_BLOCK_TYPE "M4K" #define ONCHIP_MEM_INIT_CONTENTS_FILE "onchip_mem" #define ONCHIP_MEM_NON_DEFAULT_INIT_FILE_ENABLED 0 #define ONCHIP_MEM_GUI_RAM_BLOCK_TYPE "Automatic" #define ONCHIP_MEM_WRITEABLE 1 #define ONCHIP_MEM_DUAL_PORT 0 #define ONCHIP_MEM_SIZE_VALUE 32768 #define ONCHIP_MEM_SIZE_MULTIPLE 1 #define ONCHIP_MEM_USE_SHALLOW_MEM_BLOCKS 0 #define ONCHIP_MEM_INIT_MEM_CONTENT 1 #define ONCHIP_MEM_ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0 #define ONCHIP_MEM_INSTANCE_ID "NONE" #define ONCHIP_MEM_IGNORE_AUTO_BLOCK_TYPE_ASSIGNMENT 1 #define ONCHIP_MEM_CONTENTS_INFO "QUARTUS_PROJECT_DIR/onchip_mem.hex 1200507732" #define ALT_MODULE_CLASS_onchip_mem altera_avalon_onchip_memory2 /* * timer configuration * */ #define TIMER_NAME "/dev/timer" #define TIMER_TYPE "altera_avalon_timer" #define TIMER_BASE 0x00011000 #define TIMER_SPAN 32 #define TIMER_IRQ 0 #define TIMER_ALWAYS_RUN 0 #define TIMER_FIXED_PERIOD 0 #define TIMER_SNAPSHOT 1 #define TIMER_PERIOD 1.0 #define TIMER_PERIOD_UNITS "ms" #define TIMER_RESET_OUTPUT 0 #define TIMER_TIMEOUT_PULSE_OUTPUT 0 #define TIMER_LOAD_VALUE 49999 #define TIMER_MULT 0.001 #define TIMER_FREQ 50000000 #define ALT_MODULE_CLASS_timer altera_avalon_timer /* * pio configuration * */ #define PIO_NAME "/dev/pio" #define PIO_TYPE "altera_avalon_pio" #define PIO_BASE 0x00011020 #define PIO_SPAN 16 #define PIO_DO_TEST_BENCH_WIRING 0 #define PIO_DRIVEN_SIM_VALUE 0 #define PIO_HAS_TRI 0 #define PIO_HAS_OUT 1 #define PIO_HAS_IN 1 #define PIO_CAPTURE 0 #define PIO_DATA_WIDTH 32 #define PIO_EDGE_TYPE "NONE" #define PIO_IRQ_TYPE "NONE" #define PIO_BIT_CLEARING_EDGE_REGISTER 0 #define PIO_FREQ 50000000 #define ALT_MODULE_CLASS_pio altera_avalon_pio /* * jtag_uart configuration * */ #define JTAG_UART_NAME "/dev/jtag_uart" #define JTAG_UART_TYPE "altera_avalon_jtag_uart" #define JTAG_UART_BASE 0x00011030 #define JTAG_UART_SPAN 8 #define JTAG_UART_IRQ 1 #define JTAG_UART_WRITE_DEPTH 64 #define JTAG_UART_READ_DEPTH 64 #define JTAG_UART_WRITE_THRESHOLD 8 #define JTAG_UART_READ_THRESHOLD 8 #define JTAG_UART_READ_CHAR_STREAM "" #define JTAG_UART_SHOWASCII 1 #define JTAG_UART_READ_LE 0 #define JTAG_UART_WRITE_LE 0 #define JTAG_UART_ALTERA_SHOW_UNRELEASED_JTAG_UART_FEATURES 0 #define ALT_MODULE_CLASS_jtag_uart altera_avalon_jtag_uart /* * system library configuration * */ #define ALT_MAX_FD 4 #define ALT_SYS_CLK none #define ALT_TIMESTAMP_CLK none /* * Devices associated with code sections. * */ #define ALT_TEXT_DEVICE ONCHIP_MEM #define ALT_RODATA_DEVICE ONCHIP_MEM #define ALT_RWDATA_DEVICE ONCHIP_MEM #define ALT_EXCEPTIONS_DEVICE ONCHIP_MEM #define ALT_RESET_DEVICE ONCHIP_MEM /* * The text section is initialised so no bootloader will be required. * Set a variable to tell crt0.S to provide code at the reset address and * to initialise rwdata if appropriate. */ #define ALT_NO_BOOTLOADER #endif /* __SYSTEM_H_ */
Maintained by John Loomis, updated Wed Jan 16 20:37:31 2008