CMOS Logic Inverter - Transient

CMOS LOGIC INVERTER

VDD 1 0 5V
* PULSE ( -VS +VS  TD   TR  TF  PW  PER)   ; pulse input
VIN  2  0  PULSE (0V 5V 0 0.1PS 0.1PS 40PS 80PS)

*Insert load capacitance
C1 3 0  0.68fF

*Enter the MOSFETs and set the geometrical factors W and L:
*  D G S B
M1 3 2 1 1 PCHAN W=0.75U L=0.50U
M2 3 2 0 0 NCHAN W=0.75U L=0.50U

*Specify the parameters of the two MOSFETs:
.MODEL PCHAN PMOS (VTO=-0.8 KP=21e-6 )
.MODEL NCHAN NMOS (VTO=0.7 KP=73e-6 )

.OP
.TRAN  0.1PS 120PS
.PRINT TRAN V(3)
.PROBE

.END

Maintained by John Loomis, last updated 28 Sept 1999