SRISC6 CPU

I-Format code description
signed unsigned
br

unconditional
beq
a == b a equals b
bne
a != b a not equal to b
blt bltu a < b a less than b
bgt bgtu a > b a greater than b
ble bleu a <= b a not greater than b
bge bgeu a >= b a not less than b

I-Format	code	description
signed	unsigned
`br`			unconditional
`beq`		a == b	a equals b
`bne`		a != b	a not equal to b
`blt`	`bltu`	a < b	a less than b
`bgt`	`bgtu`	a > b	a greater than b
`ble`	`bleu`	a <= b	a not greater than b
`bge`	`bgeu`	a >= b	a not less than b

pseudo-instruction

blt rA, rB, label if (signed) rA < (signed) rB
then PC = PC + 4 + se(IMMED16)

I-Format Decoder

inst opcode control muxi
br 0x06 0x08 00
cmpgei 0x08 0x0b 01
bge 0x0E 0x0b 00
cmplti 0x10 0x0a 01
blt 0x16 0x0a 00
cmpnei 0x18 0x09 01
bne 0x1E 0x09 00
cmpeqi 0x20 0x08 01
beq 0x26 0x08 00
cmpgeui 0x28 0x0f 01
bgeu 0x2E 0x0f 00
cmpltui 0x30 0x0e 01
bltu 0x36 0x0e 00

control inst control inst code description
0x08 01000 cmpeq

== a equals b
0x09 01001 cmpne

!= a not equal to b
0x0a 01010 cmplt 0x0e 01110 cmpltu < a less than b
0x0b 01011 cmpge 0x0f 01111 cmpgeu >= a not less than b

examine flags for a − b (either signed or unsigned)
mode = control[2]? unsigned: signed
test = control[1]? neg: zero cmp = control[0]? test: !test

muxi = 01 compare rA compared to se(IMM16)
muxi = 00 branch rA compared to rB
do_compare = control[5:3] == 3'b001 ibranch = do_compare && !muxc[0]

Branch Control Logic


next_pc = pc + 1'b1;
branch = (iflag? ibranch: 1'b0);

do_branch = branch&&cmp;
newpc = next_pc+(do_branch?immedse[9:2]:8'h00);

write_enable = !branch;

Maintained by John Loomis, last updated 24 October 2008