A Nios II processor is a 32-bit RISC “computer on a chip” that includes a CPU, a set of on-chip peripherals, onchip memory, and interfaces to off-chip memory, all implemented on a single Altera FPGA chip.
The purpose of this lab is to learn how to create and use a simple reconfigurable computer system. This system uses on-chip memory, and can only host relatively small software projects.
This example shows how to use the PIO peripheral, in this case connecting the outputs of the toggle switches through the cpu to the inputs of the seven-segment displays.
This page shows how to use the Debug capability of the IDE and the Nios II Instruction Set Simulator.
This page shows how to use the Nios II Command Shell (console window).
Maintained by John Loomis, last updated 17 November 2008