ECE 531/ECE 446 Microelectronics Systems Design – Spring 2015

1Tue 13-Jan introduction, history of integrated circuit:
Integrated Circuits: The Foundation of Modern Society

2Thu 15-Jan LTSpice demo, see spice01.pdf
Read textbook 1.3 Introduction to SPICE

3Tue 20-Jan layers used for VLSI fabrication, resistors and capacitors
Read textbook 2.3 Resistance Calculation, 5.2 Capacitors
4Thu 22-Jan diodes, Download
Read textbook 2.4 (diodes) and 2.5 (delays)
5Tue 27-Jan diode models, NMOS transistors
Read textbook 5.3 (MOSFETS) and chapter 6.

6Thu 29-Jan Spice generation of IV characteristic curves for NMOS.
See spice3 pdf NMOS transistor characteristics, parasitics
7Tue 03-Feb transistor parasitics, SPICE models, PMOS transistors,
transistors in parallel and series, latch-up
Read textbook Chapter 11 (Inverters) for next class.

8Thu 05-Feb Introduction to inverter and the use of LTSpice
to use symbols to represent sub-circuits that can be
instantiated repeatedly in a master schematic.

9Tue 10-Feb verify how Electric calculates parasitics from the
NMOS-transistor tutorial model. Further discussion of
symbols and hierachical circuits in LTSpice.
General discussion about the inverter.
10Thu 12-Feb Complete discussion of inverter: determining basic
characteristics, power losses, inverter chains and
ring oscillators.

11Tue 17-Feb review asgn4, video: Silicon Run I 5
12Thu 19-Feb CMOS gates, read chapter 12 (Static Logic Gates)
AOI and OAI gates

13Tue 24-Feb constructing transistor layouts from colored paper,
review topics from assignment 5

14Thu 26-Feb review for test
15Tue 03-Mar Midterm exam

Thu 05-Mar Midterm break
16Tue 10-Mar review exam, general design notes, transistor layout
methodology, transmission gates
17Thu 12-Mar multiplexors, tri-state devices
18Tue 17-Mar memory characteristics, dynamic latches
19Thu 19-Mar static latches, SR flip-flop, D latch
20Tue 24-Mar flip-flops, Verilog transistor primitives (MODSIM) 7
21Thu 26-Mar Schmidt triggers, design concepts
22Tue 31-Mar Baker Chapter 15, review asgn 7 submissions,
boundary scan (JTAG)

Thu 02-Apr Easter Break
23Tue 07-Apr Lithography video,
overview of various XOR circuits

24Thu 09-Apr Implantation video, survey of
various adder/subtracter circuits and ALU logic

25Tue 14-Apr Deposition video. memory circuits
26Thu 16-Apr Etch video. 9
27Tue 21-Apr Silicon Run II video. MEMS video.
28Thu 23-Apr review for final exam
Nanotechnology video.

29Tue 28-Apr Final Exam